== test.log == ---------------------------------------------------------------------- cmd_SUBL_subl0__z: Test Success 2010-12-13 18:44:36 Detail in /home/kazubito/2010_12/yacasl2/test/system/casl2/cmd_SUBL_subl0__z/detail.log ---------------------------------------------------------------------- == cmd == ---------------------------------------------------------------------- cat ../../../../as/cmd/SUBL/subl0__z.casl ../../../../casl2 -aTd -M8 ../../../../as/cmd/SUBL/subl0__z.casl ---------------------------------------------------------------------- == 0.txt == ---------------------------------------------------------------------- ;;; SUBL r,adr 演算結果が零 MAIN START LD GR1,A SUBL GR1,B RET A DC #FFF6 ; -10 B DC #FFF6 ; -10 END Assemble ../../../../as/cmd/SUBL/subl0__z.casl (0) Assemble ../../../../as/cmd/SUBL/subl0__z.casl (1) ../../../../as/cmd/SUBL/subl0__z.casl: 1:;;; SUBL r,adr 演算結果が零 ../../../../as/cmd/SUBL/subl0__z.casl: 2:MAIN START ../../../../as/cmd/SUBL/subl0__z.casl: 3: LD GR1,A #0000 #1010 #0001 #0005 ../../../../as/cmd/SUBL/subl0__z.casl: 4: SUBL GR1,B #0002 #2310 #0003 #0006 ../../../../as/cmd/SUBL/subl0__z.casl: 5: RET #0004 #8100 ../../../../as/cmd/SUBL/subl0__z.casl: 6:A DC #FFF6 ; -10 #0005 #FFF6 ../../../../as/cmd/SUBL/subl0__z.casl: 7:B DC #FFF6 ; -10 #0006 #FFF6 ../../../../as/cmd/SUBL/subl0__z.casl: 8: END Executing machine codes #0000: Register:::: #0000: GR0: 0 = #0000 = 0000000000000000 #0000: GR1: 0 = #0000 = 0000000000000000 #0000: GR2: 0 = #0000 = 0000000000000000 #0000: GR3: 0 = #0000 = 0000000000000000 #0000: GR4: 0 = #0000 = 0000000000000000 #0000: GR5: 0 = #0000 = 0000000000000000 #0000: GR6: 0 = #0000 = 0000000000000000 #0000: GR7: 0 = #0000 = 0000000000000000 #0000: SP: 8 = #0008 = 0000000000001000 #0000: PR: 0 = #0000 = 0000000000000000 #0000: FR (OF SF ZF): 000 #0000: Memory:::: #0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 #0000: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000 #0002: Register:::: #0002: GR0: 0 = #0000 = 0000000000000000 #0002: GR1: 65526 = #FFF6 = 1111111111110110 #0002: GR2: 0 = #0000 = 0000000000000000 #0002: GR3: 0 = #0000 = 0000000000000000 #0002: GR4: 0 = #0000 = 0000000000000000 #0002: GR5: 0 = #0000 = 0000000000000000 #0002: GR6: 0 = #0000 = 0000000000000000 #0002: GR7: 0 = #0000 = 0000000000000000 #0002: SP: 8 = #0008 = 0000000000001000 #0002: PR: 2 = #0002 = 0000000000000010 #0002: FR (OF SF ZF): 010 #0002: Memory:::: #0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 #0002: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000 #0004: Register:::: #0004: GR0: 0 = #0000 = 0000000000000000 #0004: GR1: 0 = #0000 = 0000000000000000 #0004: GR2: 0 = #0000 = 0000000000000000 #0004: GR3: 0 = #0000 = 0000000000000000 #0004: GR4: 0 = #0000 = 0000000000000000 #0004: GR5: 0 = #0000 = 0000000000000000 #0004: GR6: 0 = #0000 = 0000000000000000 #0004: GR7: 0 = #0000 = 0000000000000000 #0004: SP: 8 = #0008 = 0000000000001000 #0004: PR: 4 = #0004 = 0000000000000100 #0004: FR (OF SF ZF): 101 #0004: Memory:::: #0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 #0004: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000 ---------------------------------------------------------------------- == 1.txt == ---------------------------------------------------------------------- ;;; SUBL r,adr 演算結果が零 MAIN START LD GR1,A SUBL GR1,B RET A DC #FFF6 ; -10 B DC #FFF6 ; -10 END Assemble ../../../../as/cmd/SUBL/subl0__z.casl (0) Assemble ../../../../as/cmd/SUBL/subl0__z.casl (1) ../../../../as/cmd/SUBL/subl0__z.casl: 1:;;; SUBL r,adr 演算結果が零 ../../../../as/cmd/SUBL/subl0__z.casl: 2:MAIN START ../../../../as/cmd/SUBL/subl0__z.casl: 3: LD GR1,A #0000 #1010 #0001 #0005 ../../../../as/cmd/SUBL/subl0__z.casl: 4: SUBL GR1,B #0002 #2310 #0003 #0006 ../../../../as/cmd/SUBL/subl0__z.casl: 5: RET #0004 #8100 ../../../../as/cmd/SUBL/subl0__z.casl: 6:A DC #FFF6 ; -10 #0005 #FFF6 ../../../../as/cmd/SUBL/subl0__z.casl: 7:B DC #FFF6 ; -10 #0006 #FFF6 ../../../../as/cmd/SUBL/subl0__z.casl: 8: END Executing machine codes #0000: Register:::: #0000: GR0: 0 = #0000 = 0000000000000000 #0000: GR1: 0 = #0000 = 0000000000000000 #0000: GR2: 0 = #0000 = 0000000000000000 #0000: GR3: 0 = #0000 = 0000000000000000 #0000: GR4: 0 = #0000 = 0000000000000000 #0000: GR5: 0 = #0000 = 0000000000000000 #0000: GR6: 0 = #0000 = 0000000000000000 #0000: GR7: 0 = #0000 = 0000000000000000 #0000: SP: 8 = #0008 = 0000000000001000 #0000: PR: 0 = #0000 = 0000000000000000 #0000: FR (OF SF ZF): 000 #0000: Memory:::: #0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 #0000: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000 #0002: Register:::: #0002: GR0: 0 = #0000 = 0000000000000000 #0002: GR1: 65526 = #FFF6 = 1111111111110110 #0002: GR2: 0 = #0000 = 0000000000000000 #0002: GR3: 0 = #0000 = 0000000000000000 #0002: GR4: 0 = #0000 = 0000000000000000 #0002: GR5: 0 = #0000 = 0000000000000000 #0002: GR6: 0 = #0000 = 0000000000000000 #0002: GR7: 0 = #0000 = 0000000000000000 #0002: SP: 8 = #0008 = 0000000000001000 #0002: PR: 2 = #0002 = 0000000000000010 #0002: FR (OF SF ZF): 010 #0002: Memory:::: #0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 #0002: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000 #0004: Register:::: #0004: GR0: 0 = #0000 = 0000000000000000 #0004: GR1: 0 = #0000 = 0000000000000000 #0004: GR2: 0 = #0000 = 0000000000000000 #0004: GR3: 0 = #0000 = 0000000000000000 #0004: GR4: 0 = #0000 = 0000000000000000 #0004: GR5: 0 = #0000 = 0000000000000000 #0004: GR6: 0 = #0000 = 0000000000000000 #0004: GR7: 0 = #0000 = 0000000000000000 #0004: SP: 8 = #0008 = 0000000000001000 #0004: PR: 4 = #0004 = 0000000000000100 #0004: FR (OF SF ZF): 101 #0004: Memory:::: #0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 #0004: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000 ----------------------------------------------------------------------