--- /dev/null
+;;; OR r,adr,x
+MAIN START
+ LD GR1,A
+ LAD GR2,1
+ OR GR1,A,GR2
+ RET
+A DC #3000
+ DC #4FFF
+ END
+
+Assemble ../../../../as/cmd/OR/or_r_adr_x.casl (0)
+
+Assemble ../../../../as/cmd/OR/or_r_adr_x.casl (1)
+../../../../as/cmd/OR/or_r_adr_x.casl: 1:;;; OR r,adr,x
+../../../../as/cmd/OR/or_r_adr_x.casl: 2:MAIN START
+../../../../as/cmd/OR/or_r_adr_x.casl: 3: LD GR1,A
+ #0000 #1010
+ #0001 #0007
+../../../../as/cmd/OR/or_r_adr_x.casl: 4: LAD GR2,1
+ #0002 #1220
+ #0003 #0001
+../../../../as/cmd/OR/or_r_adr_x.casl: 5: OR GR1,A,GR2
+ #0004 #3112
+ #0005 #0007
+../../../../as/cmd/OR/or_r_adr_x.casl: 6: RET
+ #0006 #8100
+../../../../as/cmd/OR/or_r_adr_x.casl: 7:A DC #3000
+ #0007 #3000
+../../../../as/cmd/OR/or_r_adr_x.casl: 8: DC #4FFF
+ #0008 #4FFF
+../../../../as/cmd/OR/or_r_adr_x.casl: 9: END
+
+Executing machine codes
+#0000: Register::::
+#0000: GR0: 0 = #0000 = 0000000000000000
+#0000: GR1: 0 = #0000 = 0000000000000000
+#0000: GR2: 0 = #0000 = 0000000000000000
+#0000: GR3: 0 = #0000 = 0000000000000000
+#0000: GR4: 0 = #0000 = 0000000000000000
+#0000: GR5: 0 = #0000 = 0000000000000000
+#0000: GR6: 0 = #0000 = 0000000000000000
+#0000: GR7: 0 = #0000 = 0000000000000000
+#0000: SP: 16 = #0010 = 0000000000010000
+#0000: PR: 0 = #0000 = 0000000000000000
+#0000: FR (OF SF ZF): 000
+#0000: Memory::::
+#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0000: 0000: 1010 0007 1220 0001 3112 0007 8100 3000 4FFF 0000 0000 0000 0000 0000 0000 0000
+
+#0002: Register::::
+#0002: GR0: 0 = #0000 = 0000000000000000
+#0002: GR1: 12288 = #3000 = 0011000000000000
+#0002: GR2: 0 = #0000 = 0000000000000000
+#0002: GR3: 0 = #0000 = 0000000000000000
+#0002: GR4: 0 = #0000 = 0000000000000000
+#0002: GR5: 0 = #0000 = 0000000000000000
+#0002: GR6: 0 = #0000 = 0000000000000000
+#0002: GR7: 0 = #0000 = 0000000000000000
+#0002: SP: 16 = #0010 = 0000000000010000
+#0002: PR: 2 = #0002 = 0000000000000010
+#0002: FR (OF SF ZF): 000
+#0002: Memory::::
+#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0002: 0000: 1010 0007 1220 0001 3112 0007 8100 3000 4FFF 0000 0000 0000 0000 0000 0000 0000
+
+#0004: Register::::
+#0004: GR0: 0 = #0000 = 0000000000000000
+#0004: GR1: 12288 = #3000 = 0011000000000000
+#0004: GR2: 1 = #0001 = 0000000000000001
+#0004: GR3: 0 = #0000 = 0000000000000000
+#0004: GR4: 0 = #0000 = 0000000000000000
+#0004: GR5: 0 = #0000 = 0000000000000000
+#0004: GR6: 0 = #0000 = 0000000000000000
+#0004: GR7: 0 = #0000 = 0000000000000000
+#0004: SP: 16 = #0010 = 0000000000010000
+#0004: PR: 4 = #0004 = 0000000000000100
+#0004: FR (OF SF ZF): 000
+#0004: Memory::::
+#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0004: 0000: 1010 0007 1220 0001 3112 0007 8100 3000 4FFF 0000 0000 0000 0000 0000 0000 0000
+
+#0006: Register::::
+#0006: GR0: 0 = #0000 = 0000000000000000
+#0006: GR1: 32767 = #7FFF = 0111111111111111
+#0006: GR2: 1 = #0001 = 0000000000000001
+#0006: GR3: 0 = #0000 = 0000000000000000
+#0006: GR4: 0 = #0000 = 0000000000000000
+#0006: GR5: 0 = #0000 = 0000000000000000
+#0006: GR6: 0 = #0000 = 0000000000000000
+#0006: GR7: 0 = #0000 = 0000000000000000
+#0006: SP: 16 = #0010 = 0000000000010000
+#0006: PR: 6 = #0006 = 0000000000000110
+#0006: FR (OF SF ZF): 000
+#0006: Memory::::
+#0006: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0006: 0000: 1010 0007 1220 0001 3112 0007 8100 3000 4FFF 0000 0000 0000 0000 0000 0000 0000
+