X-Git-Url: http://j8takagi.net/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=test%2Fsystem%2Fcasl2%2Fcmd_JMI_jmi_p%2Fdetail.log;fp=test%2Fsystem%2Fcasl2%2Fcmd_JMI_jmi_p%2Fdetail.log;h=fd44e89dd031ad6b5da9a7ee01650c942e8dde5a;hb=c5e30b2f26ebc174c49c52c67121f3be81b5bd43;hp=0000000000000000000000000000000000000000;hpb=851e22754474ae6518109b5485130dcf86f7f880;p=YACASL2.git

diff --git a/test/system/casl2/cmd_JMI_jmi_p/detail.log b/test/system/casl2/cmd_JMI_jmi_p/detail.log
new file mode 100644
index 0000000..fd44e89
--- /dev/null
+++ b/test/system/casl2/cmd_JMI_jmi_p/detail.log
@@ -0,0 +1,294 @@
+== test.log ==
+----------------------------------------------------------------------
+cmd_JMI_jmi_p: Test Success 2010-12-13 18:44:42
+Detail in /home/kazubito/2010_12/yacasl2/test/system/casl2/cmd_JMI_jmi_p/detail.log
+----------------------------------------------------------------------
+
+== cmd ==
+----------------------------------------------------------------------
+cat ../../../../as/cmd/JMI/jmi_p.casl
+../../../../casl2 -atd -M16 ../../../../as/cmd/JMI/jmi_p.casl
+----------------------------------------------------------------------
+
+== 0.txt ==
+----------------------------------------------------------------------
+;;; JMI adr OF:0/SF:1/ZF:0
+MAIN    START
+        LD      GR1,A
+        AND     GR1,GR1
+        JMI     TO
+        LAD     GR1,0
+        JUMP    FIN
+TO      LAD     GR1,#FFFF
+FIN     RET
+A       DC      1
+        END
+
+Assemble ../../../../as/cmd/JMI/jmi_p.casl (0)
+
+Assemble ../../../../as/cmd/JMI/jmi_p.casl (1)
+../../../../as/cmd/JMI/jmi_p.casl:    1:;;; JMI adr OF:0/SF:1/ZF:0
+../../../../as/cmd/JMI/jmi_p.casl:    2:MAIN    START
+../../../../as/cmd/JMI/jmi_p.casl:    3:        LD      GR1,A
+	#0000	#1010
+	#0001	#000C
+../../../../as/cmd/JMI/jmi_p.casl:    4:        AND     GR1,GR1
+	#0002	#3411
+../../../../as/cmd/JMI/jmi_p.casl:    5:        JMI     TO
+	#0003	#6100
+	#0004	#0009
+../../../../as/cmd/JMI/jmi_p.casl:    6:        LAD     GR1,0
+	#0005	#1210
+	#0006	#0000
+../../../../as/cmd/JMI/jmi_p.casl:    7:        JUMP    FIN
+	#0007	#6400
+	#0008	#000B
+../../../../as/cmd/JMI/jmi_p.casl:    8:TO      LAD     GR1,#FFFF
+	#0009	#1210
+	#000A	#FFFF
+../../../../as/cmd/JMI/jmi_p.casl:    9:FIN     RET
+	#000B	#8100
+../../../../as/cmd/JMI/jmi_p.casl:   10:A       DC      1
+	#000C	#0001
+../../../../as/cmd/JMI/jmi_p.casl:   11:        END
+
+Executing machine codes
+#0000: Register::::
+#0000: GR0:      0 = #0000 = 0000000000000000
+#0000: GR1:      0 = #0000 = 0000000000000000
+#0000: GR2:      0 = #0000 = 0000000000000000
+#0000: GR3:      0 = #0000 = 0000000000000000
+#0000: GR4:      0 = #0000 = 0000000000000000
+#0000: GR5:      0 = #0000 = 0000000000000000
+#0000: GR6:      0 = #0000 = 0000000000000000
+#0000: GR7:      0 = #0000 = 0000000000000000
+#0000: SP:      16 = #0010 = 0000000000010000
+#0000: PR:       0 = #0000 = 0000000000000000
+#0000: FR (OF SF ZF): 000
+#0000: Memory::::
+#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0000: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0002: Register::::
+#0002: GR0:      0 = #0000 = 0000000000000000
+#0002: GR1:      1 = #0001 = 0000000000000001
+#0002: GR2:      0 = #0000 = 0000000000000000
+#0002: GR3:      0 = #0000 = 0000000000000000
+#0002: GR4:      0 = #0000 = 0000000000000000
+#0002: GR5:      0 = #0000 = 0000000000000000
+#0002: GR6:      0 = #0000 = 0000000000000000
+#0002: GR7:      0 = #0000 = 0000000000000000
+#0002: SP:      16 = #0010 = 0000000000010000
+#0002: PR:       2 = #0002 = 0000000000000010
+#0002: FR (OF SF ZF): 000
+#0002: Memory::::
+#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0002: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0003: Register::::
+#0003: GR0:      0 = #0000 = 0000000000000000
+#0003: GR1:      1 = #0001 = 0000000000000001
+#0003: GR2:      0 = #0000 = 0000000000000000
+#0003: GR3:      0 = #0000 = 0000000000000000
+#0003: GR4:      0 = #0000 = 0000000000000000
+#0003: GR5:      0 = #0000 = 0000000000000000
+#0003: GR6:      0 = #0000 = 0000000000000000
+#0003: GR7:      0 = #0000 = 0000000000000000
+#0003: SP:      16 = #0010 = 0000000000010000
+#0003: PR:       3 = #0003 = 0000000000000011
+#0003: FR (OF SF ZF): 000
+#0003: Memory::::
+#0003: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0003: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0005: Register::::
+#0005: GR0:      0 = #0000 = 0000000000000000
+#0005: GR1:      1 = #0001 = 0000000000000001
+#0005: GR2:      0 = #0000 = 0000000000000000
+#0005: GR3:      0 = #0000 = 0000000000000000
+#0005: GR4:      0 = #0000 = 0000000000000000
+#0005: GR5:      0 = #0000 = 0000000000000000
+#0005: GR6:      0 = #0000 = 0000000000000000
+#0005: GR7:      0 = #0000 = 0000000000000000
+#0005: SP:      16 = #0010 = 0000000000010000
+#0005: PR:       5 = #0005 = 0000000000000101
+#0005: FR (OF SF ZF): 000
+#0005: Memory::::
+#0005: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0005: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0007: Register::::
+#0007: GR0:      0 = #0000 = 0000000000000000
+#0007: GR1:      0 = #0000 = 0000000000000000
+#0007: GR2:      0 = #0000 = 0000000000000000
+#0007: GR3:      0 = #0000 = 0000000000000000
+#0007: GR4:      0 = #0000 = 0000000000000000
+#0007: GR5:      0 = #0000 = 0000000000000000
+#0007: GR6:      0 = #0000 = 0000000000000000
+#0007: GR7:      0 = #0000 = 0000000000000000
+#0007: SP:      16 = #0010 = 0000000000010000
+#0007: PR:       7 = #0007 = 0000000000000111
+#0007: FR (OF SF ZF): 000
+#0007: Memory::::
+#0007: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0007: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#000B: Register::::
+#000B: GR0:      0 = #0000 = 0000000000000000
+#000B: GR1:      0 = #0000 = 0000000000000000
+#000B: GR2:      0 = #0000 = 0000000000000000
+#000B: GR3:      0 = #0000 = 0000000000000000
+#000B: GR4:      0 = #0000 = 0000000000000000
+#000B: GR5:      0 = #0000 = 0000000000000000
+#000B: GR6:      0 = #0000 = 0000000000000000
+#000B: GR7:      0 = #0000 = 0000000000000000
+#000B: SP:      16 = #0010 = 0000000000010000
+#000B: PR:      11 = #000B = 0000000000001011
+#000B: FR (OF SF ZF): 000
+#000B: Memory::::
+#000B: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#000B: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+----------------------------------------------------------------------
+
+== 1.txt ==
+----------------------------------------------------------------------
+;;; JMI adr OF:0/SF:1/ZF:0
+MAIN    START
+        LD      GR1,A
+        AND     GR1,GR1
+        JMI     TO
+        LAD     GR1,0
+        JUMP    FIN
+TO      LAD     GR1,#FFFF
+FIN     RET
+A       DC      1
+        END
+
+Assemble ../../../../as/cmd/JMI/jmi_p.casl (0)
+
+Assemble ../../../../as/cmd/JMI/jmi_p.casl (1)
+../../../../as/cmd/JMI/jmi_p.casl:    1:;;; JMI adr OF:0/SF:1/ZF:0
+../../../../as/cmd/JMI/jmi_p.casl:    2:MAIN    START
+../../../../as/cmd/JMI/jmi_p.casl:    3:        LD      GR1,A
+	#0000	#1010
+	#0001	#000C
+../../../../as/cmd/JMI/jmi_p.casl:    4:        AND     GR1,GR1
+	#0002	#3411
+../../../../as/cmd/JMI/jmi_p.casl:    5:        JMI     TO
+	#0003	#6100
+	#0004	#0009
+../../../../as/cmd/JMI/jmi_p.casl:    6:        LAD     GR1,0
+	#0005	#1210
+	#0006	#0000
+../../../../as/cmd/JMI/jmi_p.casl:    7:        JUMP    FIN
+	#0007	#6400
+	#0008	#000B
+../../../../as/cmd/JMI/jmi_p.casl:    8:TO      LAD     GR1,#FFFF
+	#0009	#1210
+	#000A	#FFFF
+../../../../as/cmd/JMI/jmi_p.casl:    9:FIN     RET
+	#000B	#8100
+../../../../as/cmd/JMI/jmi_p.casl:   10:A       DC      1
+	#000C	#0001
+../../../../as/cmd/JMI/jmi_p.casl:   11:        END
+
+Executing machine codes
+#0000: Register::::
+#0000: GR0:      0 = #0000 = 0000000000000000
+#0000: GR1:      0 = #0000 = 0000000000000000
+#0000: GR2:      0 = #0000 = 0000000000000000
+#0000: GR3:      0 = #0000 = 0000000000000000
+#0000: GR4:      0 = #0000 = 0000000000000000
+#0000: GR5:      0 = #0000 = 0000000000000000
+#0000: GR6:      0 = #0000 = 0000000000000000
+#0000: GR7:      0 = #0000 = 0000000000000000
+#0000: SP:      16 = #0010 = 0000000000010000
+#0000: PR:       0 = #0000 = 0000000000000000
+#0000: FR (OF SF ZF): 000
+#0000: Memory::::
+#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0000: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0002: Register::::
+#0002: GR0:      0 = #0000 = 0000000000000000
+#0002: GR1:      1 = #0001 = 0000000000000001
+#0002: GR2:      0 = #0000 = 0000000000000000
+#0002: GR3:      0 = #0000 = 0000000000000000
+#0002: GR4:      0 = #0000 = 0000000000000000
+#0002: GR5:      0 = #0000 = 0000000000000000
+#0002: GR6:      0 = #0000 = 0000000000000000
+#0002: GR7:      0 = #0000 = 0000000000000000
+#0002: SP:      16 = #0010 = 0000000000010000
+#0002: PR:       2 = #0002 = 0000000000000010
+#0002: FR (OF SF ZF): 000
+#0002: Memory::::
+#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0002: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0003: Register::::
+#0003: GR0:      0 = #0000 = 0000000000000000
+#0003: GR1:      1 = #0001 = 0000000000000001
+#0003: GR2:      0 = #0000 = 0000000000000000
+#0003: GR3:      0 = #0000 = 0000000000000000
+#0003: GR4:      0 = #0000 = 0000000000000000
+#0003: GR5:      0 = #0000 = 0000000000000000
+#0003: GR6:      0 = #0000 = 0000000000000000
+#0003: GR7:      0 = #0000 = 0000000000000000
+#0003: SP:      16 = #0010 = 0000000000010000
+#0003: PR:       3 = #0003 = 0000000000000011
+#0003: FR (OF SF ZF): 000
+#0003: Memory::::
+#0003: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0003: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0005: Register::::
+#0005: GR0:      0 = #0000 = 0000000000000000
+#0005: GR1:      1 = #0001 = 0000000000000001
+#0005: GR2:      0 = #0000 = 0000000000000000
+#0005: GR3:      0 = #0000 = 0000000000000000
+#0005: GR4:      0 = #0000 = 0000000000000000
+#0005: GR5:      0 = #0000 = 0000000000000000
+#0005: GR6:      0 = #0000 = 0000000000000000
+#0005: GR7:      0 = #0000 = 0000000000000000
+#0005: SP:      16 = #0010 = 0000000000010000
+#0005: PR:       5 = #0005 = 0000000000000101
+#0005: FR (OF SF ZF): 000
+#0005: Memory::::
+#0005: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0005: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#0007: Register::::
+#0007: GR0:      0 = #0000 = 0000000000000000
+#0007: GR1:      0 = #0000 = 0000000000000000
+#0007: GR2:      0 = #0000 = 0000000000000000
+#0007: GR3:      0 = #0000 = 0000000000000000
+#0007: GR4:      0 = #0000 = 0000000000000000
+#0007: GR5:      0 = #0000 = 0000000000000000
+#0007: GR6:      0 = #0000 = 0000000000000000
+#0007: GR7:      0 = #0000 = 0000000000000000
+#0007: SP:      16 = #0010 = 0000000000010000
+#0007: PR:       7 = #0007 = 0000000000000111
+#0007: FR (OF SF ZF): 000
+#0007: Memory::::
+#0007: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0007: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+#000B: Register::::
+#000B: GR0:      0 = #0000 = 0000000000000000
+#000B: GR1:      0 = #0000 = 0000000000000000
+#000B: GR2:      0 = #0000 = 0000000000000000
+#000B: GR3:      0 = #0000 = 0000000000000000
+#000B: GR4:      0 = #0000 = 0000000000000000
+#000B: GR5:      0 = #0000 = 0000000000000000
+#000B: GR6:      0 = #0000 = 0000000000000000
+#000B: GR7:      0 = #0000 = 0000000000000000
+#000B: SP:      16 = #0010 = 0000000000010000
+#000B: PR:      11 = #000B = 0000000000001011
+#000B: FR (OF SF ZF): 000
+#000B: Memory::::
+#000B: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#000B: 0000: 1010 000C 3411 6100 0009 1210 0000 6400 000B 1210 FFFF 8100 0001 0000 0000 0000
+
+----------------------------------------------------------------------
+