X-Git-Url: http://j8takagi.net/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=test%2Fsystem%2Fcasl2%2Fcmd_SLL_sll_o%2Fdetail.log;fp=test%2Fsystem%2Fcasl2%2Fcmd_SLL_sll_o%2Fdetail.log;h=3c2d9c8c9d05c7f2c81b242b529093de6ad84191;hb=c5e30b2f26ebc174c49c52c67121f3be81b5bd43;hp=0000000000000000000000000000000000000000;hpb=851e22754474ae6518109b5485130dcf86f7f880;p=YACASL2.git diff --git a/test/system/casl2/cmd_SLL_sll_o/detail.log b/test/system/casl2/cmd_SLL_sll_o/detail.log new file mode 100644 index 0000000..3c2d9c8 --- /dev/null +++ b/test/system/casl2/cmd_SLL_sll_o/detail.log @@ -0,0 +1,156 @@ +== test.log == +---------------------------------------------------------------------- +cmd_SLL_sll_o: Test Success 2010-12-13 18:44:37 +Detail in /home/kazubito/2010_12/yacasl2/test/system/casl2/cmd_SLL_sll_o/detail.log +---------------------------------------------------------------------- + +== cmd == +---------------------------------------------------------------------- +cat ../../../../as/cmd/SLL/sll_o.casl +../../../../casl2 -aTd -M8 ../../../../as/cmd/SLL/sll_o.casl +---------------------------------------------------------------------- + +== 0.txt == +---------------------------------------------------------------------- +;;; SLL r,adr 正数のオーバーフロー +MAIN START + LAD GR1,2 + SLL GR1,15 + RET + END + +Assemble ../../../../as/cmd/SLL/sll_o.casl (0) + +Assemble ../../../../as/cmd/SLL/sll_o.casl (1) +../../../../as/cmd/SLL/sll_o.casl: 1:;;; SLL r,adr 正数のオーバーフロー +../../../../as/cmd/SLL/sll_o.casl: 2:MAIN START +../../../../as/cmd/SLL/sll_o.casl: 3: LAD GR1,2 + #0000 #1210 + #0001 #0002 +../../../../as/cmd/SLL/sll_o.casl: 4: SLL GR1,15 + #0002 #5210 + #0003 #000F +../../../../as/cmd/SLL/sll_o.casl: 5: RET + #0004 #8100 +../../../../as/cmd/SLL/sll_o.casl: 6: END + +Executing machine codes +#0000: Register:::: +#0000: GR0: 0 = #0000 = 0000000000000000 +#0000: GR1: 0 = #0000 = 0000000000000000 +#0000: GR2: 0 = #0000 = 0000000000000000 +#0000: GR3: 0 = #0000 = 0000000000000000 +#0000: GR4: 0 = #0000 = 0000000000000000 +#0000: GR5: 0 = #0000 = 0000000000000000 +#0000: GR6: 0 = #0000 = 0000000000000000 +#0000: GR7: 0 = #0000 = 0000000000000000 +#0000: SP: 8 = #0008 = 0000000000001000 +#0000: PR: 0 = #0000 = 0000000000000000 +#0000: FR (OF SF ZF): 000 +#0000: Memory:::: +#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0000: 0000: 1210 0002 5210 000F 8100 0000 0000 0000 +#0002: Register:::: +#0002: GR0: 0 = #0000 = 0000000000000000 +#0002: GR1: 2 = #0002 = 0000000000000010 +#0002: GR2: 0 = #0000 = 0000000000000000 +#0002: GR3: 0 = #0000 = 0000000000000000 +#0002: GR4: 0 = #0000 = 0000000000000000 +#0002: GR5: 0 = #0000 = 0000000000000000 +#0002: GR6: 0 = #0000 = 0000000000000000 +#0002: GR7: 0 = #0000 = 0000000000000000 +#0002: SP: 8 = #0008 = 0000000000001000 +#0002: PR: 2 = #0002 = 0000000000000010 +#0002: FR (OF SF ZF): 000 +#0002: Memory:::: +#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0002: 0000: 1210 0002 5210 000F 8100 0000 0000 0000 +#0004: Register:::: +#0004: GR0: 0 = #0000 = 0000000000000000 +#0004: GR1: 0 = #0000 = 0000000000000000 +#0004: GR2: 0 = #0000 = 0000000000000000 +#0004: GR3: 0 = #0000 = 0000000000000000 +#0004: GR4: 0 = #0000 = 0000000000000000 +#0004: GR5: 0 = #0000 = 0000000000000000 +#0004: GR6: 0 = #0000 = 0000000000000000 +#0004: GR7: 0 = #0000 = 0000000000000000 +#0004: SP: 8 = #0008 = 0000000000001000 +#0004: PR: 4 = #0004 = 0000000000000100 +#0004: FR (OF SF ZF): 101 +#0004: Memory:::: +#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0004: 0000: 1210 0002 5210 000F 8100 0000 0000 0000 +---------------------------------------------------------------------- + +== 1.txt == +---------------------------------------------------------------------- +;;; SLL r,adr 正数のオーバーフロー +MAIN START + LAD GR1,2 + SLL GR1,15 + RET + END + +Assemble ../../../../as/cmd/SLL/sll_o.casl (0) + +Assemble ../../../../as/cmd/SLL/sll_o.casl (1) +../../../../as/cmd/SLL/sll_o.casl: 1:;;; SLL r,adr 正数のオーバーフロー +../../../../as/cmd/SLL/sll_o.casl: 2:MAIN START +../../../../as/cmd/SLL/sll_o.casl: 3: LAD GR1,2 + #0000 #1210 + #0001 #0002 +../../../../as/cmd/SLL/sll_o.casl: 4: SLL GR1,15 + #0002 #5210 + #0003 #000F +../../../../as/cmd/SLL/sll_o.casl: 5: RET + #0004 #8100 +../../../../as/cmd/SLL/sll_o.casl: 6: END + +Executing machine codes +#0000: Register:::: +#0000: GR0: 0 = #0000 = 0000000000000000 +#0000: GR1: 0 = #0000 = 0000000000000000 +#0000: GR2: 0 = #0000 = 0000000000000000 +#0000: GR3: 0 = #0000 = 0000000000000000 +#0000: GR4: 0 = #0000 = 0000000000000000 +#0000: GR5: 0 = #0000 = 0000000000000000 +#0000: GR6: 0 = #0000 = 0000000000000000 +#0000: GR7: 0 = #0000 = 0000000000000000 +#0000: SP: 8 = #0008 = 0000000000001000 +#0000: PR: 0 = #0000 = 0000000000000000 +#0000: FR (OF SF ZF): 000 +#0000: Memory:::: +#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0000: 0000: 1210 0002 5210 000F 8100 0000 0000 0000 +#0002: Register:::: +#0002: GR0: 0 = #0000 = 0000000000000000 +#0002: GR1: 2 = #0002 = 0000000000000010 +#0002: GR2: 0 = #0000 = 0000000000000000 +#0002: GR3: 0 = #0000 = 0000000000000000 +#0002: GR4: 0 = #0000 = 0000000000000000 +#0002: GR5: 0 = #0000 = 0000000000000000 +#0002: GR6: 0 = #0000 = 0000000000000000 +#0002: GR7: 0 = #0000 = 0000000000000000 +#0002: SP: 8 = #0008 = 0000000000001000 +#0002: PR: 2 = #0002 = 0000000000000010 +#0002: FR (OF SF ZF): 000 +#0002: Memory:::: +#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0002: 0000: 1210 0002 5210 000F 8100 0000 0000 0000 +#0004: Register:::: +#0004: GR0: 0 = #0000 = 0000000000000000 +#0004: GR1: 0 = #0000 = 0000000000000000 +#0004: GR2: 0 = #0000 = 0000000000000000 +#0004: GR3: 0 = #0000 = 0000000000000000 +#0004: GR4: 0 = #0000 = 0000000000000000 +#0004: GR5: 0 = #0000 = 0000000000000000 +#0004: GR6: 0 = #0000 = 0000000000000000 +#0004: GR7: 0 = #0000 = 0000000000000000 +#0004: SP: 8 = #0008 = 0000000000001000 +#0004: PR: 4 = #0004 = 0000000000000100 +#0004: FR (OF SF ZF): 101 +#0004: Memory:::: +#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0004: 0000: 1210 0002 5210 000F 8100 0000 0000 0000 +---------------------------------------------------------------------- +