test/system/casl2_cmd/cmd_xor_r1_r2__clear/0.txt

   1 ;;; XOR r1,r2 rの内容をクリア
   2 MAIN    START
   3 BEGIN   LD      GR1,A
   4         XOR     GR1,GR1
   5         RET
   6 A       DC      3
   7         END
   8
   9 Assemble ../../../../as/cmd/XOR/xor_r1_r2__clear.casl (0)
  10
  11 Assemble ../../../../as/cmd/XOR/xor_r1_r2__clear.casl (1)
  12 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    1:;;; XOR r1,r2 rの内容をクリア
  13 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    2:MAIN    START
  14 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    3:BEGIN   LD      GR1,A
  15         #0000   #1010
  16         #0001   #0004
  17 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    4:        XOR     GR1,GR1
  18         #0002   #3611
  19 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    5:        RET
  20         #0003   #8100
  21 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    6:A       DC      3
  22         #0004   #0003
  23 ../../../../as/cmd/XOR/xor_r1_r2__clear.casl:    7:        END
  24
  25 Executing machine codes
  26 #0000: Register::::
  27 #0000: GR0:      0 = #0000 = 0000000000000000
  28 #0000: GR1:      0 = #0000 = 0000000000000000
  29 #0000: GR2:      0 = #0000 = 0000000000000000
  30 #0000: GR3:      0 = #0000 = 0000000000000000
  31 #0000: GR4:      0 = #0000 = 0000000000000000
  32 #0000: GR5:      0 = #0000 = 0000000000000000
  33 #0000: GR6:      0 = #0000 = 0000000000000000
  34 #0000: GR7:      0 = #0000 = 0000000000000000
  35 #0000: SP:       8 = #0008 = 0000000000001000
  36 #0000: PR:       0 = #0000 = 0000000000000000
  37 #0000: FR (OF SF ZF): 000
  38 #0000: Memory::::
  39 #0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007
  40        -------------------------------------------------------------------------------------
  41 #0000: 0000: 1010 0004 3611 8100 0003 0000 0000 0000
  42
  43 #0002: Register::::
  44 #0002: GR0:      0 = #0000 = 0000000000000000
  45 #0002: GR1:      3 = #0003 = 0000000000000011
  46 #0002: GR2:      0 = #0000 = 0000000000000000
  47 #0002: GR3:      0 = #0000 = 0000000000000000
  48 #0002: GR4:      0 = #0000 = 0000000000000000
  49 #0002: GR5:      0 = #0000 = 0000000000000000
  50 #0002: GR6:      0 = #0000 = 0000000000000000
  51 #0002: GR7:      0 = #0000 = 0000000000000000
  52 #0002: SP:       8 = #0008 = 0000000000001000
  53 #0002: PR:       2 = #0002 = 0000000000000010
  54 #0002: FR (OF SF ZF): 000
  55 #0002: Memory::::
  56 #0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007
  57        -------------------------------------------------------------------------------------
  58 #0002: 0000: 1010 0004 3611 8100 0003 0000 0000 0000
  59
  60 #0003: Register::::
  61 #0003: GR0:      0 = #0000 = 0000000000000000
  62 #0003: GR1:      0 = #0000 = 0000000000000000
  63 #0003: GR2:      0 = #0000 = 0000000000000000
  64 #0003: GR3:      0 = #0000 = 0000000000000000
  65 #0003: GR4:      0 = #0000 = 0000000000000000
  66 #0003: GR5:      0 = #0000 = 0000000000000000
  67 #0003: GR6:      0 = #0000 = 0000000000000000
  68 #0003: GR7:      0 = #0000 = 0000000000000000
  69 #0003: SP:       8 = #0008 = 0000000000001000
  70 #0003: PR:       3 = #0003 = 0000000000000011
  71 #0003: FR (OF SF ZF): 001
  72 #0003: Memory::::
  73 #0003: adr : 0000 0001 0002 0003 0004 0005 0006 0007
  74        -------------------------------------------------------------------------------------
  75 #0003: 0000: 1010 0004 3611 8100 0003 0000 0000 0000
  76