;;; ADDL r1,r2 MAIN START BEGIN LD GR1,A LD GR2,B ADDL GR1,GR2 RET A DC 3 B DC 1 END Assemble ../../../../as/cmd/ADDL/addl_r1_r2.casl (0) Assemble ../../../../as/cmd/ADDL/addl_r1_r2.casl (1) ../../../../as/cmd/ADDL/addl_r1_r2.casl: 1:;;; ADDL r1,r2 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 2:MAIN START ../../../../as/cmd/ADDL/addl_r1_r2.casl: 3:BEGIN LD GR1,A #0000 #1010 #0001 #0006 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 4: LD GR2,B #0002 #1020 #0003 #0007 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 5: ADDL GR1,GR2 #0004 #2612 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 6: RET #0005 #8100 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 7:A DC 3 #0006 #0003 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 8:B DC 1 #0007 #0001 ../../../../as/cmd/ADDL/addl_r1_r2.casl: 9: END Executing machine codes #0000: Register:::: #0000: GR0: 0 = #0000 = 0000000000000000 #0000: GR1: 0 = #0000 = 0000000000000000 #0000: GR2: 0 = #0000 = 0000000000000000 #0000: GR3: 0 = #0000 = 0000000000000000 #0000: GR4: 0 = #0000 = 0000000000000000 #0000: GR5: 0 = #0000 = 0000000000000000 #0000: GR6: 0 = #0000 = 0000000000000000 #0000: GR7: 0 = #0000 = 0000000000000000 #0000: SP: 16 = #0010 = 0000000000010000 #0000: PR: 0 = #0000 = 0000000000000000 #0000: FR (OF SF ZF): 000 #0000: Memory:::: #0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F ------------------------------------------------------------------------------------- #0000: 0000: 1010 0006 1020 0007 2612 8100 0003 0001 0000 0000 0000 0000 0000 0000 0000 0000 #0002: Register:::: #0002: GR0: 0 = #0000 = 0000000000000000 #0002: GR1: 3 = #0003 = 0000000000000011 #0002: GR2: 0 = #0000 = 0000000000000000 #0002: GR3: 0 = #0000 = 0000000000000000 #0002: GR4: 0 = #0000 = 0000000000000000 #0002: GR5: 0 = #0000 = 0000000000000000 #0002: GR6: 0 = #0000 = 0000000000000000 #0002: GR7: 0 = #0000 = 0000000000000000 #0002: SP: 16 = #0010 = 0000000000010000 #0002: PR: 2 = #0002 = 0000000000000010 #0002: FR (OF SF ZF): 000 #0002: Memory:::: #0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F ------------------------------------------------------------------------------------- #0002: 0000: 1010 0006 1020 0007 2612 8100 0003 0001 0000 0000 0000 0000 0000 0000 0000 0000 #0004: Register:::: #0004: GR0: 0 = #0000 = 0000000000000000 #0004: GR1: 3 = #0003 = 0000000000000011 #0004: GR2: 1 = #0001 = 0000000000000001 #0004: GR3: 0 = #0000 = 0000000000000000 #0004: GR4: 0 = #0000 = 0000000000000000 #0004: GR5: 0 = #0000 = 0000000000000000 #0004: GR6: 0 = #0000 = 0000000000000000 #0004: GR7: 0 = #0000 = 0000000000000000 #0004: SP: 16 = #0010 = 0000000000010000 #0004: PR: 4 = #0004 = 0000000000000100 #0004: FR (OF SF ZF): 000 #0004: Memory:::: #0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F ------------------------------------------------------------------------------------- #0004: 0000: 1010 0006 1020 0007 2612 8100 0003 0001 0000 0000 0000 0000 0000 0000 0000 0000 #0005: Register:::: #0005: GR0: 0 = #0000 = 0000000000000000 #0005: GR1: 4 = #0004 = 0000000000000100 #0005: GR2: 1 = #0001 = 0000000000000001 #0005: GR3: 0 = #0000 = 0000000000000000 #0005: GR4: 0 = #0000 = 0000000000000000 #0005: GR5: 0 = #0000 = 0000000000000000 #0005: GR6: 0 = #0000 = 0000000000000000 #0005: GR7: 0 = #0000 = 0000000000000000 #0005: SP: 16 = #0010 = 0000000000010000 #0005: PR: 5 = #0005 = 0000000000000101 #0005: FR (OF SF ZF): 000 #0005: Memory:::: #0005: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F ------------------------------------------------------------------------------------- #0005: 0000: 1010 0006 1020 0007 2612 8100 0003 0001 0000 0000 0000 0000 0000 0000 0000 0000