統合テストに、最新版Autotest.mkを反映

[YACASL2.git] / test / system / casl2 / cmd_CALL_call0 / 0.txt

diff --git a/test/system/casl2/cmd_CALL_call0/0.txt b/test/system/casl2/cmd_CALL_call0/0.txt
new file mode 100644 (file)
index 0000000..522b6fa
--- /dev/null
+++ b/test/system/casl2/cmd_CALL_call0/0.txt
@@ -0,0 +1,113 @@
+;;; CALL ほかのプログラムの入口名を指定
+MAIN    START
+        LAD     GR1,29
+        CALL    COPY
+        RET
+        END
+COPY    START
+        LD      GR2,GR1
+        RET
+        END
+
+Assemble ../../../../as/cmd/CALL/call0.casl (0)
+
+Assemble ../../../../as/cmd/CALL/call0.casl (1)
+../../../../as/cmd/CALL/call0.casl:    1:;;; CALL ほかのプログラムの入口名を指定
+../../../../as/cmd/CALL/call0.casl:    2:MAIN    START
+../../../../as/cmd/CALL/call0.casl:    3:        LAD     GR1,29
+       #0000   #1210
+       #0001   #001D
+../../../../as/cmd/CALL/call0.casl:    4:        CALL    COPY
+       #0002   #8000
+       #0003   #0005
+../../../../as/cmd/CALL/call0.casl:    5:        RET
+       #0004   #8100
+../../../../as/cmd/CALL/call0.casl:    6:        END
+../../../../as/cmd/CALL/call0.casl:    7:COPY    START
+../../../../as/cmd/CALL/call0.casl:    8:        LD      GR2,GR1
+       #0005   #1421
+../../../../as/cmd/CALL/call0.casl:    9:        RET
+       #0006   #8100
+../../../../as/cmd/CALL/call0.casl:   10:        END
+
+Executing machine codes
+#0000: Register::::
+#0000: GR0:      0 = #0000 = 0000000000000000
+#0000: GR1:      0 = #0000 = 0000000000000000
+#0000: GR2:      0 = #0000 = 0000000000000000
+#0000: GR3:      0 = #0000 = 0000000000000000
+#0000: GR4:      0 = #0000 = 0000000000000000
+#0000: GR5:      0 = #0000 = 0000000000000000
+#0000: GR6:      0 = #0000 = 0000000000000000
+#0000: GR7:      0 = #0000 = 0000000000000000
+#0000: SP:      16 = #0010 = 0000000000010000
+#0000: PR:       0 = #0000 = 0000000000000000
+#0000: FR (OF SF ZF): 000
+#0000: Memory::::
+#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0000: 0000: 1210 001D 8000 0005 8100 1421 8100 0000 0000 0000 0000 0000 0000 0000 0000 0000
+
+#0002: Register::::
+#0002: GR0:      0 = #0000 = 0000000000000000
+#0002: GR1:     29 = #001D = 0000000000011101
+#0002: GR2:      0 = #0000 = 0000000000000000
+#0002: GR3:      0 = #0000 = 0000000000000000
+#0002: GR4:      0 = #0000 = 0000000000000000
+#0002: GR5:      0 = #0000 = 0000000000000000
+#0002: GR6:      0 = #0000 = 0000000000000000
+#0002: GR7:      0 = #0000 = 0000000000000000
+#0002: SP:      16 = #0010 = 0000000000010000
+#0002: PR:       2 = #0002 = 0000000000000010
+#0002: FR (OF SF ZF): 000
+#0002: Memory::::
+#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0002: 0000: 1210 001D 8000 0005 8100 1421 8100 0000 0000 0000 0000 0000 0000 0000 0000 0000
+
+#0005: Register::::
+#0005: GR0:      0 = #0000 = 0000000000000000
+#0005: GR1:     29 = #001D = 0000000000011101
+#0005: GR2:      0 = #0000 = 0000000000000000
+#0005: GR3:      0 = #0000 = 0000000000000000
+#0005: GR4:      0 = #0000 = 0000000000000000
+#0005: GR5:      0 = #0000 = 0000000000000000
+#0005: GR6:      0 = #0000 = 0000000000000000
+#0005: GR7:      0 = #0000 = 0000000000000000
+#0005: SP:      15 = #000F = 0000000000001111
+#0005: PR:       5 = #0005 = 0000000000000101
+#0005: FR (OF SF ZF): 000
+#0005: Memory::::
+#0005: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0005: 0000: 1210 001D 8000 0005 8100 1421 8100 0000 0000 0000 0000 0000 0000 0000 0000 0004
+
+#0006: Register::::
+#0006: GR0:      0 = #0000 = 0000000000000000
+#0006: GR1:     29 = #001D = 0000000000011101
+#0006: GR2:     29 = #001D = 0000000000011101
+#0006: GR3:      0 = #0000 = 0000000000000000
+#0006: GR4:      0 = #0000 = 0000000000000000
+#0006: GR5:      0 = #0000 = 0000000000000000
+#0006: GR6:      0 = #0000 = 0000000000000000
+#0006: GR7:      0 = #0000 = 0000000000000000
+#0006: SP:      15 = #000F = 0000000000001111
+#0006: PR:       6 = #0006 = 0000000000000110
+#0006: FR (OF SF ZF): 000
+#0006: Memory::::
+#0006: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0006: 0000: 1210 001D 8000 0005 8100 1421 8100 0000 0000 0000 0000 0000 0000 0000 0000 0004
+
+#0004: Register::::
+#0004: GR0:      0 = #0000 = 0000000000000000
+#0004: GR1:     29 = #001D = 0000000000011101
+#0004: GR2:     29 = #001D = 0000000000011101
+#0004: GR3:      0 = #0000 = 0000000000000000
+#0004: GR4:      0 = #0000 = 0000000000000000
+#0004: GR5:      0 = #0000 = 0000000000000000
+#0004: GR6:      0 = #0000 = 0000000000000000
+#0004: GR7:      0 = #0000 = 0000000000000000
+#0004: SP:      16 = #0010 = 0000000000010000
+#0004: PR:       4 = #0004 = 0000000000000100
+#0004: FR (OF SF ZF): 000
+#0004: Memory::::
+#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
+#0004: 0000: 1210 001D 8000 0005 8100 1421 8100 0000 0000 0000 0000 0000 0000 0000 0000 0004
+