X-Git-Url: http://j8takagi.net/cgi-bin/gitweb.cgi?p=YACASL2.git;a=blobdiff_plain;f=test%2Fsystem%2Fcasl2_cmd%2Fcmd_srl%2F0.txt;fp=test%2Fsystem%2Fcasl2_cmd%2Fcmd_srl%2F0.txt;h=3a04f65c273614ca4529a2545198f993c0155479;hp=0000000000000000000000000000000000000000;hb=473906d23322ef829ee8dad807895235d645981c;hpb=7ac339dcd755848e9820142422752fbdc8186b5c diff --git a/test/system/casl2_cmd/cmd_srl/0.txt b/test/system/casl2_cmd/cmd_srl/0.txt new file mode 100644 index 0000000..3a04f65 --- /dev/null +++ b/test/system/casl2_cmd/cmd_srl/0.txt @@ -0,0 +1,68 @@ +;;; SRL r,adr +MAIN START + LAD GR1,#C000 + SRL GR1,14 + RET + END + +Assemble ../../../../as/cmd/SRL/srl.casl (0) + +Assemble ../../../../as/cmd/SRL/srl.casl (1) +../../../../as/cmd/SRL/srl.casl: 1:;;; SRL r,adr +../../../../as/cmd/SRL/srl.casl: 2:MAIN START +../../../../as/cmd/SRL/srl.casl: 3: LAD GR1,#C000 + #0000 #1210 + #0001 #C000 +../../../../as/cmd/SRL/srl.casl: 4: SRL GR1,14 + #0002 #5310 + #0003 #000E +../../../../as/cmd/SRL/srl.casl: 5: RET + #0004 #8100 +../../../../as/cmd/SRL/srl.casl: 6: END + +Executing machine codes +#0000: Register:::: +#0000: GR0: 0 = #0000 = 0000000000000000 +#0000: GR1: 0 = #0000 = 0000000000000000 +#0000: GR2: 0 = #0000 = 0000000000000000 +#0000: GR3: 0 = #0000 = 0000000000000000 +#0000: GR4: 0 = #0000 = 0000000000000000 +#0000: GR5: 0 = #0000 = 0000000000000000 +#0000: GR6: 0 = #0000 = 0000000000000000 +#0000: GR7: 0 = #0000 = 0000000000000000 +#0000: SP: 8 = #0008 = 0000000000001000 +#0000: PR: 0 = #0000 = 0000000000000000 +#0000: FR (OF SF ZF): 000 +#0000: Memory:::: +#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0000: 0000: 1210 C000 5310 000E 8100 0000 0000 0000 +#0002: Register:::: +#0002: GR0: 0 = #0000 = 0000000000000000 +#0002: GR1: -16384 = #C000 = 1100000000000000 +#0002: GR2: 0 = #0000 = 0000000000000000 +#0002: GR3: 0 = #0000 = 0000000000000000 +#0002: GR4: 0 = #0000 = 0000000000000000 +#0002: GR5: 0 = #0000 = 0000000000000000 +#0002: GR6: 0 = #0000 = 0000000000000000 +#0002: GR7: 0 = #0000 = 0000000000000000 +#0002: SP: 8 = #0008 = 0000000000001000 +#0002: PR: 2 = #0002 = 0000000000000010 +#0002: FR (OF SF ZF): 000 +#0002: Memory:::: +#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0002: 0000: 1210 C000 5310 000E 8100 0000 0000 0000 +#0004: Register:::: +#0004: GR0: 0 = #0000 = 0000000000000000 +#0004: GR1: 3 = #0003 = 0000000000000011 +#0004: GR2: 0 = #0000 = 0000000000000000 +#0004: GR3: 0 = #0000 = 0000000000000000 +#0004: GR4: 0 = #0000 = 0000000000000000 +#0004: GR5: 0 = #0000 = 0000000000000000 +#0004: GR6: 0 = #0000 = 0000000000000000 +#0004: GR7: 0 = #0000 = 0000000000000000 +#0004: SP: 8 = #0008 = 0000000000001000 +#0004: PR: 4 = #0004 = 0000000000000100 +#0004: FR (OF SF ZF): 000 +#0004: Memory:::: +#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 +#0004: 0000: 1210 C000 5310 000E 8100 0000 0000 0000