LD GR1,A
ADDA GR1,B
RET
-A DC 32767
-B DC 10
+A DC #7FFE ; 32766
+B DC #000A ; 10
END
--- /dev/null
+;;; ADDA r,adr 演算結果が零
+MAIN START
+ LD GR1,A
+ ADDA GR1,B
+ RET
+A DC #FFF6 ; -10
+B DC 10
+ END
--- /dev/null
+;;; ADDA r,adr ADDLではオーバーフロー
+MAIN START
+ LD GR1,A
+ ADDA GR1,B
+ RET
+A DC #FFFE ; -2
+B DC #000F ; 15
+ END
--- /dev/null
+;;; ADDA r,adr オーバーフロー
+MAIN START
+ LD GR1,A
+ ADDA GR1,B
+ RET
+A DC #8002 ; -32766
+B DC #8001 ; -32767
+ END
+++ /dev/null
-;;; ADDA r,adr 負数でオーバーフロー
-MAIN START
- LD GR1,A
- ADDA GR1,B
- RET
-A DC #8001 ; -32767
-B DC #FFF6 ; -10
- END
LD GR1,A
ADDA GR1,B
RET
-A DC 10
+A DC #000A ; 10
B DC #FFEC ; -20
END
LD GR1,A
ADDA GR1,B
RET
-A DC -10
-B DC 20
+A DC #FFEC ; -20
+B DC #000A ; 10
END
LD GR1,A
ADDA GR1,B
RET
-A DC -10
- DC 10
+A DC 0
+B DC 0
END
+++ /dev/null
-;;; ADDA r,adr,x 負数でオーバーフロー
-MAIN START
- LD GR1,A
- LAD GR2,1
- ADDA GR1,A,GR2
- RET
-A DC #8001 ; -32767
- DC #FFF6 ; -10
- END
+++ /dev/null
-;;; ADDA r,adr,x 負数でオーバーフロー
-MAIN START
- LD GR1,A
- LAD GR2,1
- ADDA GR1,A,GR2
- RET
-A DC #8001 ; -32767
- DC #FFF6 ; -10
- END
+++ /dev/null
-;;; ADDA r,adr,x 演算結果が負数(r > adr)
-MAIN START
- LD GR1,A
- LAD GR2,1
- ADDA GR1,A,GR2
- RET
-A DC 10
- DC #FFEC ; -20
- END
+++ /dev/null
-;;; ADDA r,adr,x 演算結果が負数(r < adr)
-MAIN START
- LD GR1,A
- LAD GR2,1
- ADDA GR1,A,GR2
- RET
-A DC -10
- DC 20
- END
+++ /dev/null
-;;; ADDA r1,adr,x 演算結果が零
-MAIN START
- LD GR1,A
- LAD GR2,1
- ADDA GR1,A,GR2
- RET
-A DC -10
- DC 10
- END
+++ /dev/null
-;;; ADDA r1,r2 正数でオーバーフロー
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC 32767
-B DC 10
- END
+++ /dev/null
-;;; ADDA r1,r2 負数でオーバーフロー
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC -32767
-B DC -10
- END
+++ /dev/null
-;;; ADDA r1,r2 演算結果が負数(r1 > r2)
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC 10
-B DC #FFEC ; -20
- END
+++ /dev/null
-;;; ADDA r1,r2 演算結果が負数(r1 < r2)
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC -10
-B DC 20
- END
+++ /dev/null
-;;; ADDA r1,r2 演算結果が零
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC -10
-B DC 10
- END
-;;; ADDL r,addr[,x]
+;;; ADDL r,adr
MAIN START
-BEGIN LAD GR1,A
+BEGIN LD GR1,A
ADDL GR1,B
RET
A DC 3
--- /dev/null
+;;; ADDL r,adr ADDAでは正数でオーバーフロー
+MAIN START
+ LD GR1,A
+ ADDL GR1,B
+ RET
+A DC #7FFE ; 32766
+B DC #000A ; 10
+ END
-;;; ADDL r,addr[,x] 正数でオーバーフロー発生
+;;; ADDL r,adr ADDAでは演算結果が零
MAIN START
LD GR1,A
ADDL GR1,B
RET
-A DC 32767
+A DC #FFF6 ; -10
B DC 10
END
--- /dev/null
+;;; ADDL r,adr ADDLではオーバーフロー
+MAIN START
+ LD GR1,A
+ ADDL GR1,B
+ RET
+A DC #FFFE ; -2
+B DC #000F ; 15
+ END
--- /dev/null
+;;; ADDL r,adr オーバーフロー
+MAIN START
+ LD GR1,A
+ ADDL GR1,B
+ RET
+A DC #8002 ; 32770
+B DC #8001 ; 32769
+ END
+++ /dev/null
-;;; ADDL r,addr[,x] 負数でオーバーフロー発生
-MAIN START
- LD GR1,A
- ADDL GR1,B
- RET
-A DC #8001 ; -32767
-B DC #FFF6 ; -10
- END
-;;; ADDL r,addr[,x] 演算結果の符号が負(r > adr)
+;;; ADDL r,adr 演算結果が負数(r > adr)
MAIN START
LD GR1,A
ADDL GR1,B
RET
-A DC 10
-B DC #FFEC ; -20
+A DC #000A ; 10
+B DC #FFEC ; -20
END
-;;; ADDL r,addr[,x] 演算結果の符号が負(r < adr)
+;;; ADDL r,adr 演算結果が負数(r < adr)
MAIN START
LD GR1,A
ADDL GR1,B
RET
-A DC #FFEC ; -20
-B DC 10
+A DC #FFEC ; -20
+B DC #000A ; 10
END
-;;; ADDL r,addr[,x] 演算結果が零
+;;; ADDL r,adr 演算結果が零
MAIN START
LD GR1,A
ADDL GR1,B
RET
-A DC 10
-B DC #FFF6 ; -10
+A DC 0
+B DC 0
END
-;;; ADDL r1,r2
+;;; ADDL r,adr,x
MAIN START
BEGIN LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
+ LAD GR2,1
+ ADDL GR1,A,GR2
RET
A DC 3
-B DC 1
+ DC 1
END
+++ /dev/null
-;;; ADDL r1,r2 正数でオーバーフロー発生
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC 32767
-B DC 10
- END
+++ /dev/null
-;;; ADDL r1,r2 負数でオーバーフロー発生
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDA GR1,GR2
- RET
-A DC -32767
-B DC -10
- END
+++ /dev/null
-;;; ADDL r1,r2 演算結果の符号が負(r1 > r2)
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDL GR1,GR2
- RET
-A DC 10
-B DC #FFEC ; -20
- END
+++ /dev/null
-;;; ADDL r1,r2 演算結果の符号が負(r1 < r2)
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDL GR1,GR2
- RET
-A DC #FFEC ; -20
-B DC 10
- END
+++ /dev/null
-;;; ADDL r1,r2 演算結果が零
-MAIN START
- LD GR1,A
- LD GR2,B
- ADDL GR1,GR2
- RET
-A DC 10
-B DC #FFF6 ; -10
- END
--- /dev/null
+;;; ADDL r1,r2
+MAIN START
+BEGIN LD GR1,A
+ LD GR2,B
+ ADDL GR1,GR2
+ RET
+A DC 3
+B DC 1
+ END
+++ /dev/null
-;;; AND r1,r2 演算結果の符号が負
-MAIN START
- LD GR1,A
- LD GR2,B
- AND GR1,GR2
- RET
-A DC #8000
-B DC #FFFF
- END
+++ /dev/null
-;;; AND r1,r2 演算結果が零
-MAIN START
- LD GR1,A
- LD GR2,B
- AND GR1,GR2
- RET
-A DC #1
-B DC #FFFE
- END
+;;; CPA r,adr
MAIN START BEGIN
BEGIN LD GR1,A
CPA GR1,B
+;;; CPA r,adr
MAIN START BEGIN
BEGIN LD GR1,A
CPA GR1,B
+;;; CPA r,adr SF:1
MAIN START BEGIN
BEGIN LD GR1,A
CPA GR1,B
+;;; CPA r,adr ZF:0
MAIN START BEGIN
BEGIN LD GR1,A
CPA GR1,B
+++ /dev/null
-MAIN START BEGIN
-BEGIN LAD GR1,#5000
- LAD GR2,#7000
- CPA GR2,GR1
- RET
- END
+++ /dev/null
-MAIN START BEGIN
-BEGIN LAD GR1,#5000
- LAD GR2,#3000
- CPA GR2,GR1
- RET
- END
+++ /dev/null
-MAIN START BEGIN
-BEGIN LAD GR1,#5000
- LAD GR2,#5000
- CPA GR1,GR2
- RET
- END
--- /dev/null
+;;; CPA r,adr,x SF:1
+MAIN START BEGIN
+BEGIN LD GR1,A
+ LAD GR2,1
+ CPA GR1,A,GR2
+ RET
+A DC #5000
+ DC #7000
+ END
+;;; CPA r1,r2 SF:1
MAIN START BEGIN
BEGIN LD GR1,A
LD GR2,B
CPA GR1,GR2
RET
A DC #5000
-B DC #8000
+B DC #7000
END
--- /dev/null
+;;; CPL r,adr
+MAIN START BEGIN
+BEGIN LD GR1,A
+ CPL GR1,B
+ RET
+A DC #5000
+B DC #3000
+ END
--- /dev/null
+;;; CPL r,adr
+MAIN START BEGIN
+BEGIN LD GR1,A
+ CPL GR1,B
+ RET
+A DC #5000
+B DC #8000
+ END
--- /dev/null
+;;; CPL r,adr SF:1
+MAIN START BEGIN
+BEGIN LD GR1,A
+ CPL GR1,B
+ RET
+A DC #5000
+B DC #7000
+ END
--- /dev/null
+;;; CPL r,adr ZF:0
+MAIN START BEGIN
+BEGIN LD GR1,A
+ CPL GR1,B
+ RET
+A DC #5000
+B DC #5000
+ END
+++ /dev/null
-MAIN START
-BEGIN LAD GR1,#5000
- LAD GR2,#F000
- CPL GR1,GR2
- RET
- END
--- /dev/null
+;;; CPL r,adr,x SF:1
+MAIN START BEGIN
+BEGIN LD GR1,A
+ LAD GR2,1
+ CPL GR1,A,GR2
+ RET
+A DC #5000
+ DC #7000
+ END
+++ /dev/null
-MAIN START
-BEGIN LAD GR0,#3000
- CPL GR0,A
- RET
-A DC #A000
- END
--- /dev/null
+;;; CPL r1,r2 SF:1
+MAIN START BEGIN
+BEGIN LD GR1,A
+ LD GR2,B
+ CPL GR1,GR2
+ RET
+A DC #5000
+B DC #7000
+ END
+++ /dev/null
-MAIN START
-BEGIN LAD GR1,#5000
- ADDL GR1,=#FFFF
- LAD GR2,#F000
- CPL GR1,GR2
- RET
- END
--- /dev/null
+;; DC 文字定数
+MAIN START
+ RET
+ DC ' '
+ DC '!'
+ DC '"'
+ DC '#'
+ DC '$'
+ DC '%'
+ DC '&'
+ DC ''''
+ DC '('
+ DC ')'
+ DC '*'
+ DC '+'
+ DC ','
+ DC '-'
+ DC '.'
+ DC '/'
+ DC '0'
+ DC '1'
+ DC '2'
+ DC '3'
+ DC '4'
+ DC '5'
+ DC '6'
+ DC '7'
+ DC '8'
+ DC '9'
+ DC ':'
+ DC ';'
+ DC '<'
+ DC '='
+ DC '>'
+ DC '?'
+ DC '@'
+ DC 'A'
+ DC 'B'
+ DC 'C'
+ DC 'D'
+ DC 'E'
+ DC 'F'
+ DC 'G'
+ DC 'H'
+ DC 'I'
+ DC 'J'
+ DC 'K'
+ DC 'L'
+ DC 'M'
+ DC 'N'
+ DC 'O'
+ DC 'P'
+ DC 'Q'
+ DC 'R'
+ DC 'S'
+ DC 'T'
+ DC 'U'
+ DC 'V'
+ DC 'W'
+ DC 'X'
+ DC 'Y'
+ DC 'Z'
+ DC '['
+ DC '\'
+ DC ']'
+ DC '^'
+ DC '_'
+ DC 'a'
+ DC 'b'
+ DC 'c'
+ DC 'd'
+ DC 'e'
+ DC 'f'
+ DC 'g'
+ DC 'h'
+ DC 'i'
+ DC 'j'
+ DC 'k'
+ DC 'l'
+ DC 'm'
+ DC 'n'
+ DC 'o'
+ DC 'p'
+ DC 'q'
+ DC 'r'
+ DC 's'
+ DC 't'
+ DC 'u'
+ DC 'v'
+ DC 'w'
+ DC 'x'
+ DC 'y'
+ DC 'z'
+ DC '{'
+ DC '|'
+ DC '}'
+ DC '~'
+ END
--- /dev/null
+;; DC 文字定数
+MAIN START
+ RET
+ DC ' !"#$%&''()*+,-./0123456789:;<=>?@ABCDEFG'
+ DC 'GHIJKLMNOPQRSTUVWXYZ[\]^_abcdefghijklmno'
+ DC 'pqrstuvwxyz{|}~'
+ END
--- /dev/null
+;; DC命令で、-32768〜32768の範囲にない10進数値を指定
+MAIN START
+ RET
+ DC 0
+ DC 1
+ DC 10
+ DC 32767
+ DC 32768
+ DC 65535
+ DC 65536
+ DC 65537
+ DC -1
+ DC -10
+ DC -32767
+ DC -32768
+ DC -32769
+ DC #0
+ DC #1
+ DC #01
+ DC #001
+ DC #0001
+ DC #10
+ DC #11
+ DC #F
+ DC #000F
+ DC #FFFF
+ END
--- /dev/null
+;; DC命令で、-32768〜32768の範囲にない10進数値を指定
+MAIN START
+ RET
+ DC 1, 10, 32767, 32768, 65535, 65536, 65537,-1, -10, -32767, -32768, -32769, #0, #1, #01, #001, #0001, #10, #11,#F, #000F, #FFFF
+ END
BUF3 DC '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
L3 DC 32
BUF4 DC '`abcdefghijklmnopqrstuvwxyz{|}~'
-L4 DC 32
+L4 DC 31
END