From: j8takagi Date: Thu, 2 Jul 2026 15:10:32 +0000 (+0900) Subject: comet2 -mオプションのテストを追加 X-Git-Tag: v0.6p08~1 X-Git-Url: https://j8takagi.net/gitweb?a=commitdiff_plain;h=e4c3a77b37405fe52cee400145f6f73f16d267da;p=yacasl2.git comet2 -mオプションのテストを追加 --- diff --git a/test/system/comet2_opt/opt_m/0.txt b/test/system/comet2_opt/opt_m/0.txt new file mode 100644 index 0000000..774e0bf --- /dev/null +++ b/test/system/comet2_opt/opt_m/0.txt @@ -0,0 +1,147 @@ + LAD GR1,#0001 ; #0000: #1210 #0001 + LAD GR2,#000C ; #0002: #1220 #000C + LD GR3,GR2 ; #0004: #1432 + LD GR4,#000C ; #0005: #1040 #000C + ST GR3,#000D ; #0007: #1130 #000D + ST GR4,#000D,GR1 ; #0009: #1141 #000D + RET ; #000B: #8100 + DC 3 ; #000C: #0003 :: 3 = #0003 = 0000000000000011 + DS 2 ; #000D: #0000 + ; #000E: #0000 +#0000: Register:::: +#0000: GR0: 0 = #0000 = 0000000000000000 +#0000: GR1: 0 = #0000 = 0000000000000000 +#0000: GR2: 0 = #0000 = 0000000000000000 +#0000: GR3: 0 = #0000 = 0000000000000000 +#0000: GR4: 0 = #0000 = 0000000000000000 +#0000: GR5: 0 = #0000 = 0000000000000000 +#0000: GR6: 0 = #0000 = 0000000000000000 +#0000: GR7: 0 = #0000 = 0000000000000000 +#0000: SP: 16 = #0010 = 0000000000010000 +#0000: PR: 0 = #0000 = 0000000000000000 +#0000: FR (OF SF ZF): 000 +#0000: Memory:::: +#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#0000: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 0000 0000 0000 +#0000: Disassemble:::: LAD GR1,#0001 ; #0000: #1210 #0001 + +COMET II machine code monitor. Type ? for help. +> n +#0002: Register:::: +#0002: GR0: 0 = #0000 = 0000000000000000 +#0002: GR1: 1 = #0001 = 0000000000000001 +#0002: GR2: 0 = #0000 = 0000000000000000 +#0002: GR3: 0 = #0000 = 0000000000000000 +#0002: GR4: 0 = #0000 = 0000000000000000 +#0002: GR5: 0 = #0000 = 0000000000000000 +#0002: GR6: 0 = #0000 = 0000000000000000 +#0002: GR7: 0 = #0000 = 0000000000000000 +#0002: SP: 16 = #0010 = 0000000000010000 +#0002: PR: 2 = #0002 = 0000000000000010 +#0002: FR (OF SF ZF): 000 +#0002: Memory:::: +#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#0002: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 0000 0000 0000 +#0002: Disassemble:::: LAD GR2,#000C ; #0002: #1220 #000C + +> n +#0004: Register:::: +#0004: GR0: 0 = #0000 = 0000000000000000 +#0004: GR1: 1 = #0001 = 0000000000000001 +#0004: GR2: 12 = #000C = 0000000000001100 +#0004: GR3: 0 = #0000 = 0000000000000000 +#0004: GR4: 0 = #0000 = 0000000000000000 +#0004: GR5: 0 = #0000 = 0000000000000000 +#0004: GR6: 0 = #0000 = 0000000000000000 +#0004: GR7: 0 = #0000 = 0000000000000000 +#0004: SP: 16 = #0010 = 0000000000010000 +#0004: PR: 4 = #0004 = 0000000000000100 +#0004: FR (OF SF ZF): 000 +#0004: Memory:::: +#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#0004: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 0000 0000 0000 +#0004: Disassemble:::: LD GR3,GR2 ; #0004: #1432 + +> n +#0005: Register:::: +#0005: GR0: 0 = #0000 = 0000000000000000 +#0005: GR1: 1 = #0001 = 0000000000000001 +#0005: GR2: 12 = #000C = 0000000000001100 +#0005: GR3: 12 = #000C = 0000000000001100 +#0005: GR4: 0 = #0000 = 0000000000000000 +#0005: GR5: 0 = #0000 = 0000000000000000 +#0005: GR6: 0 = #0000 = 0000000000000000 +#0005: GR7: 0 = #0000 = 0000000000000000 +#0005: SP: 16 = #0010 = 0000000000010000 +#0005: PR: 5 = #0005 = 0000000000000101 +#0005: FR (OF SF ZF): 000 +#0005: Memory:::: +#0005: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#0005: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 0000 0000 0000 +#0005: Disassemble:::: LD GR4,#000C ; #0005: #1040 #000C + +> n +#0007: Register:::: +#0007: GR0: 0 = #0000 = 0000000000000000 +#0007: GR1: 1 = #0001 = 0000000000000001 +#0007: GR2: 12 = #000C = 0000000000001100 +#0007: GR3: 12 = #000C = 0000000000001100 +#0007: GR4: 3 = #0003 = 0000000000000011 +#0007: GR5: 0 = #0000 = 0000000000000000 +#0007: GR6: 0 = #0000 = 0000000000000000 +#0007: GR7: 0 = #0000 = 0000000000000000 +#0007: SP: 16 = #0010 = 0000000000010000 +#0007: PR: 7 = #0007 = 0000000000000111 +#0007: FR (OF SF ZF): 000 +#0007: Memory:::: +#0007: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#0007: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 0000 0000 0000 +#0007: Disassemble:::: ST GR3,#000D ; #0007: #1130 #000D + +> n +#0009: Register:::: +#0009: GR0: 0 = #0000 = 0000000000000000 +#0009: GR1: 1 = #0001 = 0000000000000001 +#0009: GR2: 12 = #000C = 0000000000001100 +#0009: GR3: 12 = #000C = 0000000000001100 +#0009: GR4: 3 = #0003 = 0000000000000011 +#0009: GR5: 0 = #0000 = 0000000000000000 +#0009: GR6: 0 = #0000 = 0000000000000000 +#0009: GR7: 0 = #0000 = 0000000000000000 +#0009: SP: 16 = #0010 = 0000000000010000 +#0009: PR: 9 = #0009 = 0000000000001001 +#0009: FR (OF SF ZF): 000 +#0009: Memory:::: +#0009: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#0009: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 000C 0000 0000 +#0009: Disassemble:::: ST GR4,#000D,GR1 ; #0009: #1141 #000D + +> n +#000B: Register:::: +#000B: GR0: 0 = #0000 = 0000000000000000 +#000B: GR1: 1 = #0001 = 0000000000000001 +#000B: GR2: 12 = #000C = 0000000000001100 +#000B: GR3: 12 = #000C = 0000000000001100 +#000B: GR4: 3 = #0003 = 0000000000000011 +#000B: GR5: 0 = #0000 = 0000000000000000 +#000B: GR6: 0 = #0000 = 0000000000000000 +#000B: GR7: 0 = #0000 = 0000000000000000 +#000B: SP: 16 = #0010 = 0000000000010000 +#000B: PR: 11 = #000B = 0000000000001011 +#000B: FR (OF SF ZF): 000 +#000B: Memory:::: +#000B: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F + ------------------------------------------------------------------------------------- +#000B: 0000: 1210 0001 1220 000C 1432 1040 000C 1130 000D 1141 000D 8100 0003 000C 0003 0000 +#000B: Disassemble:::: RET ; #000B: #8100 + +> n +Return to top. +> q +Quit: COMET II monitor diff --git a/test/system/comet2_opt/opt_m/Makefile b/test/system/comet2_opt/opt_m/Makefile new file mode 100644 index 0000000..b6dac59 --- /dev/null +++ b/test/system/comet2_opt/opt_m/Makefile @@ -0,0 +1,2 @@ +include ../Define.mk +include ../Test.mk diff --git a/test/system/comet2_opt/opt_m/cmd b/test/system/comet2_opt/opt_m/cmd new file mode 100755 index 0000000..4cf0d6e --- /dev/null +++ b/test/system/comet2_opt/opt_m/cmd @@ -0,0 +1 @@ +../../../../comet2 -mTd -M16 ../../../../as/sample/ldlad.o