Assemble ../../../../as/cmd/LD/ld_r_adr.casl (0)
Assemble ../../../../as/cmd/LD/ld_r_adr.casl (1)
../../../../as/cmd/LD/ld_r_adr.casl: 1:MAIN START
../../../../as/cmd/LD/ld_r_adr.casl: 2: LD GR0,A
#0000 #1000
#0001 #0007
../../../../as/cmd/LD/ld_r_adr.casl: 3: LD GR0,B
#0002 #1000
#0003 #0008
../../../../as/cmd/LD/ld_r_adr.casl: 4: LD GR0,C
#0004 #1000
#0005 #0009
../../../../as/cmd/LD/ld_r_adr.casl: 5: RET
#0006 #8100
../../../../as/cmd/LD/ld_r_adr.casl: 6:A DC 7
#0007 #0007
../../../../as/cmd/LD/ld_r_adr.casl: 7:B DC -7
#0008 #FFF9
../../../../as/cmd/LD/ld_r_adr.casl: 8:C DC 0
#0009 #0000
../../../../as/cmd/LD/ld_r_adr.casl: 9: END
Executing machine codes
#0000: Register::::
#0000: GR0: 0 = #0000 = 0000000000000000
#0000: GR1: 0 = #0000 = 0000000000000000
#0000: GR2: 0 = #0000 = 0000000000000000
#0000: GR3: 0 = #0000 = 0000000000000000
#0000: GR4: 0 = #0000 = 0000000000000000
#0000: GR5: 0 = #0000 = 0000000000000000
#0000: GR6: 0 = #0000 = 0000000000000000
#0000: GR7: 0 = #0000 = 0000000000000000
#0000: SP: 16 = #0010 = 0000000000010000
#0000: PR: 0 = #0000 = 0000000000000000
#0000: FR (OF SF ZF): 000
#0000: Memory::::
#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0000: 0000: 1000 0007 1000 0008 1000 0009 8100 0007 FFF9 0000 0000 0000 0000 0000 0000 0000
#0002: Register::::
#0002: GR0: 7 = #0007 = 0000000000000111
#0002: GR1: 0 = #0000 = 0000000000000000
#0002: GR2: 0 = #0000 = 0000000000000000
#0002: GR3: 0 = #0000 = 0000000000000000
#0002: GR4: 0 = #0000 = 0000000000000000
#0002: GR5: 0 = #0000 = 0000000000000000
#0002: GR6: 0 = #0000 = 0000000000000000
#0002: GR7: 0 = #0000 = 0000000000000000
#0002: SP: 16 = #0010 = 0000000000010000
#0002: PR: 2 = #0002 = 0000000000000010
#0002: FR (OF SF ZF): 000
#0002: Memory::::
#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0002: 0000: 1000 0007 1000 0008 1000 0009 8100 0007 FFF9 0000 0000 0000 0000 0000 0000 0000
#0004: Register::::
#0004: GR0: -7 = #FFF9 = 1111111111111001
#0004: GR1: 0 = #0000 = 0000000000000000
#0004: GR2: 0 = #0000 = 0000000000000000
#0004: GR3: 0 = #0000 = 0000000000000000
#0004: GR4: 0 = #0000 = 0000000000000000
#0004: GR5: 0 = #0000 = 0000000000000000
#0004: GR6: 0 = #0000 = 0000000000000000
#0004: GR7: 0 = #0000 = 0000000000000000
#0004: SP: 16 = #0010 = 0000000000010000
#0004: PR: 4 = #0004 = 0000000000000100
#0004: FR (OF SF ZF): 010
#0004: Memory::::
#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0004: 0000: 1000 0007 1000 0008 1000 0009 8100 0007 FFF9 0000 0000 0000 0000 0000 0000 0000
#0006: Register::::
#0006: GR0: 0 = #0000 = 0000000000000000
#0006: GR1: 0 = #0000 = 0000000000000000
#0006: GR2: 0 = #0000 = 0000000000000000
#0006: GR3: 0 = #0000 = 0000000000000000
#0006: GR4: 0 = #0000 = 0000000000000000
#0006: GR5: 0 = #0000 = 0000000000000000
#0006: GR6: 0 = #0000 = 0000000000000000
#0006: GR7: 0 = #0000 = 0000000000000000
#0006: SP: 16 = #0010 = 0000000000010000
#0006: PR: 6 = #0006 = 0000000000000110
#0006: FR (OF SF ZF): 001
#0006: Memory::::
#0006: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0006: 0000: 1000 0007 1000 0008 1000 0009 8100 0007 FFF9 0000 0000 0000 0000 0000 0000 0000