test/system/casl2/cmd_SUBL_subl0__z/detail.log

   1 == test.log ==
   2 ----------------------------------------------------------------------
   3 cmd_SUBL_subl0__z: Test Success 2010-12-13 18:44:36
   4 Detail in /home/kazubito/2010_12/yacasl2/test/system/casl2/cmd_SUBL_subl0__z/detail.log
   5 ----------------------------------------------------------------------
   6
   7 == cmd ==
   8 ----------------------------------------------------------------------
   9 cat ../../../../as/cmd/SUBL/subl0__z.casl
  10 ../../../../casl2 -aTd -M8 ../../../../as/cmd/SUBL/subl0__z.casl
  11 ----------------------------------------------------------------------
  12
  13 == 0.txt ==
  14 ----------------------------------------------------------------------
  15 ;;; SUBL r,adr 演算結果が零
  16 MAIN    START
  17         LD      GR1,A
  18         SUBL    GR1,B
  19         RET
  20 A       DC      #FFF6           ; -10
  21 B       DC      #FFF6           ; -10
  22         END
  23
  24 Assemble ../../../../as/cmd/SUBL/subl0__z.casl (0)
  25
  26 Assemble ../../../../as/cmd/SUBL/subl0__z.casl (1)
  27 ../../../../as/cmd/SUBL/subl0__z.casl:    1:;;; SUBL r,adr 演算結果が零
  28 ../../../../as/cmd/SUBL/subl0__z.casl:    2:MAIN    START
  29 ../../../../as/cmd/SUBL/subl0__z.casl:    3:        LD      GR1,A
  30         #0000   #1010
  31         #0001   #0005
  32 ../../../../as/cmd/SUBL/subl0__z.casl:    4:        SUBL    GR1,B
  33         #0002   #2310
  34         #0003   #0006
  35 ../../../../as/cmd/SUBL/subl0__z.casl:    5:        RET
  36         #0004   #8100
  37 ../../../../as/cmd/SUBL/subl0__z.casl:    6:A       DC      #FFF6           ; -10
  38         #0005   #FFF6
  39 ../../../../as/cmd/SUBL/subl0__z.casl:    7:B       DC      #FFF6           ; -10
  40         #0006   #FFF6
  41 ../../../../as/cmd/SUBL/subl0__z.casl:    8:        END
  42
  43 Executing machine codes
  44 #0000: Register::::
  45 #0000: GR0:      0 = #0000 = 0000000000000000
  46 #0000: GR1:      0 = #0000 = 0000000000000000
  47 #0000: GR2:      0 = #0000 = 0000000000000000
  48 #0000: GR3:      0 = #0000 = 0000000000000000
  49 #0000: GR4:      0 = #0000 = 0000000000000000
  50 #0000: GR5:      0 = #0000 = 0000000000000000
  51 #0000: GR6:      0 = #0000 = 0000000000000000
  52 #0000: GR7:      0 = #0000 = 0000000000000000
  53 #0000: SP:       8 = #0008 = 0000000000001000
  54 #0000: PR:       0 = #0000 = 0000000000000000
  55 #0000: FR (OF SF ZF): 000
  56 #0000: Memory::::
  57 #0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007
  58 #0000: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000
  59 #0002: Register::::
  60 #0002: GR0:      0 = #0000 = 0000000000000000
  61 #0002: GR1:  65526 = #FFF6 = 1111111111110110
  62 #0002: GR2:      0 = #0000 = 0000000000000000
  63 #0002: GR3:      0 = #0000 = 0000000000000000
  64 #0002: GR4:      0 = #0000 = 0000000000000000
  65 #0002: GR5:      0 = #0000 = 0000000000000000
  66 #0002: GR6:      0 = #0000 = 0000000000000000
  67 #0002: GR7:      0 = #0000 = 0000000000000000
  68 #0002: SP:       8 = #0008 = 0000000000001000
  69 #0002: PR:       2 = #0002 = 0000000000000010
  70 #0002: FR (OF SF ZF): 010
  71 #0002: Memory::::
  72 #0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007
  73 #0002: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000
  74 #0004: Register::::
  75 #0004: GR0:      0 = #0000 = 0000000000000000
  76 #0004: GR1:      0 = #0000 = 0000000000000000
  77 #0004: GR2:      0 = #0000 = 0000000000000000
  78 #0004: GR3:      0 = #0000 = 0000000000000000
  79 #0004: GR4:      0 = #0000 = 0000000000000000
  80 #0004: GR5:      0 = #0000 = 0000000000000000
  81 #0004: GR6:      0 = #0000 = 0000000000000000
  82 #0004: GR7:      0 = #0000 = 0000000000000000
  83 #0004: SP:       8 = #0008 = 0000000000001000
  84 #0004: PR:       4 = #0004 = 0000000000000100
  85 #0004: FR (OF SF ZF): 101
  86 #0004: Memory::::
  87 #0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007
  88 #0004: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000
  89 ----------------------------------------------------------------------
  90
  91 == 1.txt ==
  92 ----------------------------------------------------------------------
  93 ;;; SUBL r,adr 演算結果が零
  94 MAIN    START
  95         LD      GR1,A
  96         SUBL    GR1,B
  97         RET
  98 A       DC      #FFF6           ; -10
  99 B       DC      #FFF6           ; -10
 100         END
 101
 102 Assemble ../../../../as/cmd/SUBL/subl0__z.casl (0)
 103
 104 Assemble ../../../../as/cmd/SUBL/subl0__z.casl (1)
 105 ../../../../as/cmd/SUBL/subl0__z.casl:    1:;;; SUBL r,adr 演算結果が零
 106 ../../../../as/cmd/SUBL/subl0__z.casl:    2:MAIN    START
 107 ../../../../as/cmd/SUBL/subl0__z.casl:    3:        LD      GR1,A
 108         #0000   #1010
 109         #0001   #0005
 110 ../../../../as/cmd/SUBL/subl0__z.casl:    4:        SUBL    GR1,B
 111         #0002   #2310
 112         #0003   #0006
 113 ../../../../as/cmd/SUBL/subl0__z.casl:    5:        RET
 114         #0004   #8100
 115 ../../../../as/cmd/SUBL/subl0__z.casl:    6:A       DC      #FFF6           ; -10
 116         #0005   #FFF6
 117 ../../../../as/cmd/SUBL/subl0__z.casl:    7:B       DC      #FFF6           ; -10
 118         #0006   #FFF6
 119 ../../../../as/cmd/SUBL/subl0__z.casl:    8:        END
 120
 121 Executing machine codes
 122 #0000: Register::::
 123 #0000: GR0:      0 = #0000 = 0000000000000000
 124 #0000: GR1:      0 = #0000 = 0000000000000000
 125 #0000: GR2:      0 = #0000 = 0000000000000000
 126 #0000: GR3:      0 = #0000 = 0000000000000000
 127 #0000: GR4:      0 = #0000 = 0000000000000000
 128 #0000: GR5:      0 = #0000 = 0000000000000000
 129 #0000: GR6:      0 = #0000 = 0000000000000000
 130 #0000: GR7:      0 = #0000 = 0000000000000000
 131 #0000: SP:       8 = #0008 = 0000000000001000
 132 #0000: PR:       0 = #0000 = 0000000000000000
 133 #0000: FR (OF SF ZF): 000
 134 #0000: Memory::::
 135 #0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007
 136 #0000: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000
 137 #0002: Register::::
 138 #0002: GR0:      0 = #0000 = 0000000000000000
 139 #0002: GR1:  65526 = #FFF6 = 1111111111110110
 140 #0002: GR2:      0 = #0000 = 0000000000000000
 141 #0002: GR3:      0 = #0000 = 0000000000000000
 142 #0002: GR4:      0 = #0000 = 0000000000000000
 143 #0002: GR5:      0 = #0000 = 0000000000000000
 144 #0002: GR6:      0 = #0000 = 0000000000000000
 145 #0002: GR7:      0 = #0000 = 0000000000000000
 146 #0002: SP:       8 = #0008 = 0000000000001000
 147 #0002: PR:       2 = #0002 = 0000000000000010
 148 #0002: FR (OF SF ZF): 010
 149 #0002: Memory::::
 150 #0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007
 151 #0002: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000
 152 #0004: Register::::
 153 #0004: GR0:      0 = #0000 = 0000000000000000
 154 #0004: GR1:      0 = #0000 = 0000000000000000
 155 #0004: GR2:      0 = #0000 = 0000000000000000
 156 #0004: GR3:      0 = #0000 = 0000000000000000
 157 #0004: GR4:      0 = #0000 = 0000000000000000
 158 #0004: GR5:      0 = #0000 = 0000000000000000
 159 #0004: GR6:      0 = #0000 = 0000000000000000
 160 #0004: GR7:      0 = #0000 = 0000000000000000
 161 #0004: SP:       8 = #0008 = 0000000000001000
 162 #0004: PR:       4 = #0004 = 0000000000000100
 163 #0004: FR (OF SF ZF): 101
 164 #0004: Memory::::
 165 #0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007
 166 #0004: 0000: 1010 0005 2310 0006 8100 FFF6 FFF6 0000
 167 ----------------------------------------------------------------------
 168