+;;; SUBL r,adr オーバーフロー
+MAIN START
+ LD GR1,A
+ SUBL GR1,B
+ RET
+A DC #8002 ; -32766
+B DC #7FFF ; 32767
+ END
+
+Assemble ../../../../as/cmd/SUBL/subl_r_adr__o.casl (0)
+
+Assemble ../../../../as/cmd/SUBL/subl_r_adr__o.casl (1)
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 1:;;; SUBL r,adr オーバーフロー
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 2:MAIN START
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 3: LD GR1,A
+ #0000 #1010
+ #0001 #0005
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 4: SUBL GR1,B
+ #0002 #2310
+ #0003 #0006
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 5: RET
+ #0004 #8100
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 6:A DC #8002 ; -32766
+ #0005 #8002
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 7:B DC #7FFF ; 32767
+ #0006 #7FFF
+../../../../as/cmd/SUBL/subl_r_adr__o.casl: 8: END
+
+Executing machine codes
+#0000: Register::::
+#0000: GR0: 0 = #0000 = 0000000000000000
+#0000: GR1: 0 = #0000 = 0000000000000000
+#0000: GR2: 0 = #0000 = 0000000000000000
+#0000: GR3: 0 = #0000 = 0000000000000000
+#0000: GR4: 0 = #0000 = 0000000000000000
+#0000: GR5: 0 = #0000 = 0000000000000000
+#0000: GR6: 0 = #0000 = 0000000000000000
+#0000: GR7: 0 = #0000 = 0000000000000000
+#0000: SP: 8 = #0008 = 0000000000001000
+#0000: PR: 0 = #0000 = 0000000000000000
+#0000: FR (OF SF ZF): 000
+#0000: Memory::::
+#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007
+#0000: 0000: 1010 0005 2310 0006 8100 8002 7FFF 0000
+#0002: Register::::
+#0002: GR0: 0 = #0000 = 0000000000000000
+#0002: GR1: 32770 = #8002 = 1000000000000010
+#0002: GR2: 0 = #0000 = 0000000000000000
+#0002: GR3: 0 = #0000 = 0000000000000000
+#0002: GR4: 0 = #0000 = 0000000000000000
+#0002: GR5: 0 = #0000 = 0000000000000000
+#0002: GR6: 0 = #0000 = 0000000000000000
+#0002: GR7: 0 = #0000 = 0000000000000000
+#0002: SP: 8 = #0008 = 0000000000001000
+#0002: PR: 2 = #0002 = 0000000000000010
+#0002: FR (OF SF ZF): 010
+#0002: Memory::::
+#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007
+#0002: 0000: 1010 0005 2310 0006 8100 8002 7FFF 0000
+#0004: Register::::
+#0004: GR0: 0 = #0000 = 0000000000000000
+#0004: GR1: 3 = #0003 = 0000000000000011
+#0004: GR2: 0 = #0000 = 0000000000000000
+#0004: GR3: 0 = #0000 = 0000000000000000
+#0004: GR4: 0 = #0000 = 0000000000000000
+#0004: GR5: 0 = #0000 = 0000000000000000
+#0004: GR6: 0 = #0000 = 0000000000000000
+#0004: GR7: 0 = #0000 = 0000000000000000
+#0004: SP: 8 = #0008 = 0000000000001000
+#0004: PR: 4 = #0004 = 0000000000000100
+#0004: FR (OF SF ZF): 100
+#0004: Memory::::
+#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007
+#0004: 0000: 1010 0005 2310 0006 8100 8002 7FFF 0000