LD GR1,A
SUBL GR1,B
RET
-A DC #FFEC ; -20
-B DC #FFF6 ; -10
+A DC #FFEC ; 65516
+B DC #FFF6 ; 65526
END
Assemble ../../../../as/cmd/SUBL/subl_r_adr__as1.casl (0)
#0003 #0006
../../../../as/cmd/SUBL/subl_r_adr__as1.casl: 5: RET
#0004 #8100
-../../../../as/cmd/SUBL/subl_r_adr__as1.casl: 6:A DC #FFEC ; -20
+../../../../as/cmd/SUBL/subl_r_adr__as1.casl: 6:A DC #FFEC ; 65516
#0005 #FFEC
-../../../../as/cmd/SUBL/subl_r_adr__as1.casl: 7:B DC #FFF6 ; -10
+../../../../as/cmd/SUBL/subl_r_adr__as1.casl: 7:B DC #FFF6 ; 65526
#0006 #FFF6
../../../../as/cmd/SUBL/subl_r_adr__as1.casl: 8: END
#0004: GR7: 0 = #0000 = 0000000000000000
#0004: SP: 8 = #0008 = 0000000000001000
#0004: PR: 4 = #0004 = 0000000000000100
-#0004: FR (OF SF ZF): 010
+#0004: FR (OF SF ZF): 110
#0004: Memory::::
#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007
#0004: 0000: 1010 0005 2310 0006 8100 FFEC FFF6 0000