casl2libとtestを整理

[YACASL2.git] / test / system / casl2_cmd / cmd_xor_r_adr__z / 0.txt

diff --git a/test/system/casl2_cmd/cmd_xor_r_adr__z/0.txt b/test/system/casl2_cmd/cmd_xor_r_adr__z/0.txt
new file mode 100644 (file)
index 0000000..467c3da
--- /dev/null
+++ b/test/system/casl2_cmd/cmd_xor_r_adr__z/0.txt
@@ -0,0 +1,74 @@
+;;; XOR r,adr 演算結果が零
+MAIN    START
+        LD      GR1,A
+        XOR     GR1,B
+        RET
+A       DC      #0001
+B       DC      #FFFE
+        END
+
+Assemble ../../../../as/cmd/XOR/xor_r_adr__z.casl (0)
+
+Assemble ../../../../as/cmd/XOR/xor_r_adr__z.casl (1)
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    1:;;; XOR r,adr 演算結果が零
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    2:MAIN    START
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    3:        LD      GR1,A
+       #0000   #1010
+       #0001   #0005
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    4:        XOR     GR1,B
+       #0002   #3210
+       #0003   #0006
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    5:        RET
+       #0004   #8100
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    6:A       DC      #0001
+       #0005   #0001
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    7:B       DC      #FFFE
+       #0006   #FFFE
+../../../../as/cmd/XOR/xor_r_adr__z.casl:    8:        END
+
+Executing machine codes
+#0000: Register::::
+#0000: GR0:      0 = #0000 = 0000000000000000
+#0000: GR1:      0 = #0000 = 0000000000000000
+#0000: GR2:      0 = #0000 = 0000000000000000
+#0000: GR3:      0 = #0000 = 0000000000000000
+#0000: GR4:      0 = #0000 = 0000000000000000
+#0000: GR5:      0 = #0000 = 0000000000000000
+#0000: GR6:      0 = #0000 = 0000000000000000
+#0000: GR7:      0 = #0000 = 0000000000000000
+#0000: SP:       8 = #0008 = 0000000000001000
+#0000: PR:       0 = #0000 = 0000000000000000
+#0000: FR (OF SF ZF): 000
+#0000: Memory::::
+#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007
+#0000: 0000: 1010 0005 3210 0006 8100 0001 FFFE 0000 
+#0002: Register::::
+#0002: GR0:      0 = #0000 = 0000000000000000
+#0002: GR1:      1 = #0001 = 0000000000000001
+#0002: GR2:      0 = #0000 = 0000000000000000
+#0002: GR3:      0 = #0000 = 0000000000000000
+#0002: GR4:      0 = #0000 = 0000000000000000
+#0002: GR5:      0 = #0000 = 0000000000000000
+#0002: GR6:      0 = #0000 = 0000000000000000
+#0002: GR7:      0 = #0000 = 0000000000000000
+#0002: SP:       8 = #0008 = 0000000000001000
+#0002: PR:       2 = #0002 = 0000000000000010
+#0002: FR (OF SF ZF): 000
+#0002: Memory::::
+#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007
+#0002: 0000: 1010 0005 3210 0006 8100 0001 FFFE 0000 
+#0004: Register::::
+#0004: GR0:      0 = #0000 = 0000000000000000
+#0004: GR1:     -1 = #FFFF = 1111111111111111
+#0004: GR2:      0 = #0000 = 0000000000000000
+#0004: GR3:      0 = #0000 = 0000000000000000
+#0004: GR4:      0 = #0000 = 0000000000000000
+#0004: GR5:      0 = #0000 = 0000000000000000
+#0004: GR6:      0 = #0000 = 0000000000000000
+#0004: GR7:      0 = #0000 = 0000000000000000
+#0004: SP:       8 = #0008 = 0000000000001000
+#0004: PR:       4 = #0004 = 0000000000000100
+#0004: FR (OF SF ZF): 010
+#0004: Memory::::
+#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007
+#0004: 0000: 1010 0005 3210 0006 8100 0001 FFFE 0000